1. Field of the Invention
The present invention relates to hybrid elements of an electrically writable non-volatile memory and a DRAM and other elements such as a Logic IC, etc.
2. Description of the Related Art
Conventionally, in a non-volatile memory such as a flash memory having floating gates and control gates, a gate oxidation film below the floating gates (hereinafter referred to as a first oxidation film) is used as an oxidation film for memory cell transistors, and information is stored by causing a threshold value of a memory cell transistor to change as a result of removing or injecting electrical charge into the floating gate using CHE (channel Hot Electron) current or FN (Fowler-Nordheim) tunnel current by applying a high voltage to the first gate oxidation film.
It is required that the film thickness of the first gate oxidation film in the memory cell transistor is thin, for example 100 .ANG., so as to carry out rewriting. However, even if a gate oxidation film as thin as, for example, 100 .ANG. is used underneath the floating gate of the memory cell, if a capacitive coupling ratio between the control gates and the floating gates is assumed to be 0.7 then a voltage required for rewriting becomes 10V or more. If the first gate oxidation film is used directly on peripheral transistors, an electric field applied to the oxidation film becomes 10MV/cm and it is not possible to ensure the reliability of the oxidation film.
As a result, a gate oxidation film thicker than an ordinary first gate oxidation film is applied to peripheral transistors. Specifically, a common manufacturing method forms peripheral transistors with a gate oxidation film of approximately 200 .ANG., and to with electrodes of the same material as control gates of memory cell transistors.
In the example of the related art described thus far, the case has been described where only one type of gate oxidation film is used for peripheral circuits, namely a gate oxidation film with a thickness of 200 .ANG.. However, there are also cases where transistors are formed having gate oxidation films of differing thicknesses, such as those for high withstand pressure or low voltage use. As such a manufacturing method, there is a method of respectively forming two types of gate oxidation film separately for transistors of peripheral circuits and transistors of memory cells, as disclosed in, for example, Japanese Patent Laid-open Publication No. Hei. 6-177360.
However, with the above described method, since it is necessary to respectively form two types of gate oxidation film for the memory cells and separate portions, there is a problem that the number of manufacturing steps is increased compared to a method where one only type of gate oxidation film is formed for the memory cells and other portions.